1. Technical Field
The present invention generally relates to a fabrication process and, more particularly, to a fabrication process using a thin resist. The fabrication process is usable, for example, in manufacturing processes for manufacturing semiconductor integrated circuits such as semiconductor memory devices.
2. Description of Related Art
In the fabrication of semiconductor integrated circuits such as semiconductor memory devices, optical photofabrication techniques may be used to provide desired patterns for circuit features. These techniques typically involve the controlled projection of actinic light (e.g., ultraviolet (UV) radiation) in order to transfer a pattern from a photolithographic mask onto a layer of light-sensitive material such as a resist deposited on a semiconductor wafer. The mask typically embodies a light transmissive substrate with a layer of light blocking material defining the patterns of circuit features to be transferred to the resist coated wafer. If a negative resist is used, then the projected exposure light passing through the mask will cause the exposed areas of the resist layer to undergo polymerization and cross-linking, resulting in an increased molecular weight. In a subsequent development step, unexposed portions of the resist layer will wash off with the developer, leaving a pattern of resist material constituting a reverse or negative image of the mask pattern. Alternatively, if a positive resist is used, the exposure light passing through the mask will cause the exposed portions of the resist layer to become soluble to the developer, such that the exposed resist layer portions will wash away in the development step, leaving a pattern of resist material corresponding directly to the mask pattern. In both cases, the remaining resist will serve to define a pattern of exposed material that will undergo subsequent processing steps (e.g., etching and deposition) for forming the desired semiconductor devices. The exposed material may, for example, be an insulator, a conductor, or a semiconductor.
Two important parameters of a lithography system are resolution and depth of focus. Resolution is a measure of the ability of the system to form separate images of closely spaced objects. Using a quarter micron (0.25.mu.) ground rule, the minimum resolution may be expressed using the conventional Rayleigh equation as: ##EQU1## where R is the minimum resolution; .lambda. is the wavelength of the exposure light (e.g., .lambda.=248 nanometers); NA is the numerical aperture (a lens design parameter) (e.g., NA=0.5); and K.sub.1 is a first empirical process parameter (e.g., K.sub.1 =0.5). K.sub.1 is a system process parameter which takes into account factors such as a finite resist thickness, partial coherency .sigma. (condenser lens NA/projection lens NA) of the optics, and pattern structures. In general, K.sub.1 is equal to about 0.5 to about 0.6 for deep ultraviolet (DUV) (.lambda.=248 nanometers) lithography.
An optical image degrades as the system is defocused, and the amount of defocusing that can be tolerated is called depth of focus (DOF). Increased DOF will minimize the adverse effects of slight deviations of the exposure tool from a best focus condition. The DOF may be expressed using the conventional Rayleigh equation as: ##EQU2## where DOF is the depth of focus; .lambda. is the wavelength of the exposure light (e.g., .lambda.=248 nanometers); NA is the numerical aperture (a lens design parameter) (e.g., NA=0.5); and K.sub.2 is a second empirical process parameter (e.g., K.sub.2 =0.7). To take into account a finite resist thickness d, the DOF may be expressed as: ##EQU3## where DOF is the depth of focus; .lambda. is the wavelength of the exposure light (e.g., .lambda.=248 nanometers); NA is the numerical aperture (a lens design parameter) (e.g., NA=0.5); d is the thickness of the resist; n is the refractive index of the resist at the wavelength of the exposure light (i.e., 248 nanometers); and K.sub.2 is a second empirical process parameter (e.g., K.sub.2 =0.7). See, for example, Arnold et al., Proc. SPIE 772, 21 (1987) and Boettiger et al., Microelectronics Engineering 23, 159(1994).
In advanced lithography processes such as DUV lithography processes, the reduction of ground rules to quarter-micron or below requires a methodology for achieving higher resolution capability. However, improved resolution is obtained at the expense of depth of focus. Thus, for example, the higher the NA of the lens being used, the more difficult it is to keep the whole wafer properly focused. Accordingly, it would be desirable to provide a methodology for achieving higher resolution capability without sacrificing or degrading any process windows such as depth of focus.